UCLA

High bandwidth and spectral efficiency requirements in today's wireless communication systems require innovative architectures to maintain high transmitter efficiency. Polar transmitters with a high efficiency switching power amplifier offer a promising solution to this problem. Such architectures require phase and envelope modulators with wider bandwidths than their Cartesian counterparts. This work presents a open loop phase modulator with 12 physical bits which is designed to operate at a carrier frequency of 1.25GHz with a phase bandwidth of up to 125MHz. The system was implemented in 65nm commercial CMOS process and a prototype IC achieved 8-bit linearity with pre-distortion and was modulated with PSK signals at 20.83MS/s while consuming 27mW of power. Separately, the problem of envelope modulation with a split-band envelope modulated system is considered. A MATLAB/Simulink model was developed to analyze trade-offs between efficiency, dynamic range and error in such a system.