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A New Horizon for the Fabrication of Nitrogen-Polar Gallium Nitride High Electron Mobility Transistors

Abstract

This dissertation advances the epitaxial growth, physical understanding, and device engineering of N-polar GaN high electron mobility transistors (HEMTs) for next-generation high-frequency and high-power electronics. Although N-polar GaN offers intrinsic advantages— including a natural back-barrier, scalable gate-to-channel distance, and compatibility with thick GaN cap layers—its broader adoption has been limited by challenges in epitaxy, electron transport near pinch-off, buffer design, and reliable enhancement-mode operation. This work addresses these challenges through a comprehensive investigation that spans materials development, device physics, and transistor fabrication using plasma-assisted molecular beam epitaxy (PAMBE). First, N-polar GaN HEMT structures were developed on low-dislocation-density on-axis N-polar GaN substrates by PAMBE, enabling smooth surfaces, abrupt interfaces, reduced unintentional impurity incorporation, and improved two-dimensional electron gas (2DEG) transport. Using gated transfer length method and capacitance–voltage analysis, this dissertation demonstrates, for the first time, an increase in electron mobility as 2DEG density is reduced in N-polar GaN. A record mobility of 2000 cm2/V·s at room temperature and 6000 cm2/V·s at 85 K was achieved near pinch-off, addressing one of the challenges of N-polar for Class-AB power amplifier biasing. To further improve device reliability and manufacturability, the dissertation evaluates gate dielectric engineering by comparing ALD HfSiO with conventional MOCVD SiN in deeprecess N-polar HEMTs. HfSiO provides a higher dielectric constant, improved breakdown strength (7.6 V gate breakdown; 115 V off-state drain breakdown), and reduced DC–RF dispersion. Building on these insights, a simplified undoped AlGaN back-barrier design grown by PAMBE is introduced. A systematic buffer-thickness study (100–400 nm) reveals that thicker buffers suppress dispersion by spatially isolating the channel from carbon-related traps while maintaining nanoampere-scale leakage. Devices with 150 nm gate lengths achieve fT ≈ 65 GHz, fMAX up to 206 GHz, and output power as high as 7.2 W/mm with 48% power-added efficiency (PAE) at 10 GHz, demonstrating performance comparable to complex MOCVD grown N-polar HEMTs. Finally, this work demonstrates the first enhancement-mode (normally-off) N-polar deeprecess GaN HEMTs using a combination of atomic layer etching, wet etching, and high-k HfSiO dielectric. Devices with a 75 nm recessed gate exhibit a threshold voltage of +0.8 V, 1.5 A/mm saturation current, 0.55 S/mm transconductance, and record small-signal performance with fT = 122 GHz and fT ·LG = 9.1 GHz·μm. Large-signal operation confirms 2.7 W/mm output power and 46% PAE at 10 GHz. Collectively, this dissertation establishes a unified framework for high-performance N-polar GaN electronics by integrating advances in epitaxial growth, charge transport physics, dielectric engineering, and transistor design. The demonstrated normally-off operation, high breakdown reliability, high-frequency metrics, and multi-watt mm-wave power capabilities position N-polar GaN HEMTs as a promising platform for future RF, mm-wave, and power conversion systems.

Main Content

This item is under embargo until January 26, 2028.