UC Berkeley

Since the beginnings of the semiconductor revolution, device engineering and material development have been deeply interconnected. Innovations in one invariably spurred development in the other. One of the most important current challenges are developing techniques which enable deposition of materials on arbitrary substrates and the design constraints of devices fabricated via these techniques. This thesis focuses on furthering the materials development-device design cycle for three techniques: (i) epitaxial lift-off, (ii) nanowire growth via the vapor-liquid-solid growth mode, and (iii) the thin-film vapor-liquid-solid growth technique. The physics of devices made via (i) and (ii) are discussed in chapters two and three, the material science of (iii) is discussed in chapter four, and a method to engineer the physical and electronic properties of individual nanowires made via (ii) is discussed in chapter

Chapter two deals with the device physics and performance of ultra-thin compound semiconductor on insulator field effect transistors. Due to its excellent electron transport properties, InAs is used as the material of choice for the transistors, termed XOI FETs. These devices are fabricated utilizing an epitaxial layer transfer technique, enabling highly lattice mismatched single-crystalline layers of InAs to be deposited on Si wafers. Allowing devices which combine the excellent transport properties of compound-semiconductors and the established processing infrastructure for silicon. Chapter three discusses the design constraints and guidelines for nanopillar photovoltaics, specifically those fabricated utilizing the CdS/CdTe material system. Critically, the materials parameters that are favorable to non-planar cells are discussed, and the performance expectations for CdS/CdTe nanopillar photovoltaics are discussed.

Chapter four focuses on a growth technique developed to enable growth of ultra-large grain III-V semiconductors on non-epitaxial substrates, termed thin-film vapor-liquid-solid growth. This growth technique takes advantage of the vapor liquid solid growth mode to enable films with thickness down to 500 nm and grain sizes greater than 50 m. This represents a significant advance over all conventional growth techniques, which produce films with grain sizes 10-100x smaller. Furthermore, the optoelectronic quality of these materials is within a few percent of single crystal, as determined by quantitative luminescence efficiency measurements. Finally, Chapter five discusses the use of nanowires as physical templates, allowing engineering of Van der Waals forces to fabricate self-selective electrical connectors. By utilizing nanowire forests as starting templates, successive layers of material are deposited, each playing a specific role in the final structure, enabling composite material properties otherwise not possible.