Directed acyclic graphs or Bayesian networks that are popular in many AI-related sectors for probabilistic inference and causal reasoning can be mapped to probabilistic circuits built out of probabilistic bits (p-bits), analogous to binary stochastic neurons of stochastic artificial neural networks. In order to satisfy standard statistical results, individual p-bits not only need to be updated sequentially but also in order from the parent to the child nodes, necessitating the use of sequencers in software implementations. In this article, we first use SPICE simulations to show that an autonomous hardware Bayesian network can operate correctly without any clocks or sequencers, but only if the individual p-bits are appropriately designed. We then present a simple behavioral model of the autonomous hardware illustrating the essential characteristics needed for correct sequencer-free operation. This model is also benchmarked against SPICE simulations and can be used to simulate large-scale networks. Our results could be useful in the design of hardware accelerators that use energy-efficient building blocks suited for low-level implementations of Bayesian networks. The autonomous massively parallel operation of our proposed stochastic hardware has biological relevance since neural dynamics in brain is also stochastic and autonomous by nature.

Modern machine learning is based on powerful algorithms running on digital computing platforms and there is great interest in accelerating the learning process and making it more energy efficient. In this paper we present a fully autonomous probabilistic circuit for fast and efficient learning that makes no use of digital computing. Specifically we use SPICE simulations to demonstrate a clockless autonomous circuit where the required synaptic weights are read out in the form of analog voltages. This allows us to demonstrate a circuit that can be built with existing technology to emulate the Boltzmann machine learning algorithm based on gradient optimization of the maximum likelihood function. Such autonomous circuits could be particularly of interest as standalone learning devices in the context of mobile and edge computing.

In this article we present a concrete design for a probabilistic (p-) computer based on a network of p-bits, robust classical entities fluctuating between -1 and +1, with probabilities that are controlled through an input constructed from the outputs of other p-bits. The architecture of this probabilistic computer is similar to a stochastic neural network with the p-bit playing the role of a binary stochastic neuron, but with one key difference: there is no sequencer used to enforce an ordering of p-bit updates, as is typically required. Instead, we explore sequencerless designs where all p-bits are allowed to flip autonomously and demonstrate that such designs can allow ultrafast operation unconstrained by available clock speeds without compromising the solution's fidelity. Based on experimental results from a hardware benchmark of the autonomous design and benchmarked device models, we project that a nanomagnetic implementation can scale to achieve petaflips per second with millions of neurons. A key contribution of this article is the focus on a hardware metric - flips per second - as a problem and substrate-independent figure-of-merit for an emerging class of hardware annealers known as Ising Machines. Much like the shrinking feature sizes of transistors that have continually driven Moore's Law, we believe that flips per second can be continually improved in later technology generations of a wide class of probabilistic, domain specific hardware.

Low-barrier nanomagnets have attracted a great deal of research interest for their use as sources of high-quality true random number generation. More recently, low-barrier nanomagnets with tunable output have been shown to be a natural hardware platform for unconventional computing paradigms such as probabilistic spin logic. Efficient generation and tunability of high-quality random bits is critical for these novel applications. However, current spintronic random number generators are based on superparamagnetic tunnel junctions with tunability obtained through spin transfer torque, which unavoidably leads to challenges in designing concatenated networks using these two terminal devices. The more recent development of utilizing spin orbit torque (SOT) allows for a three-terminal device design, but can only tune in-plane magnetization freely, which is not very energy efficient due to the needs of overcoming a large demagnetization field. In this work, we experimentally demonstrate a stochastic device with perpendicular magnetic anisotropy that is completely tunable by SOT without the aid of any external magnetic field. Our measurements lead us to hypothesize that a tilted anisotropy might be responsible for the observed tunability. We carry out stochastic Landau-Lifshitz-Gilbert simulations to confirm our experimental observation. Finally, we build an electrically coupled network of two such stochastic nanomagnet-based devices and demonstrate that finite correlation or anticorrelation can be established between their output fluctuations by a weak interconnection, despite having a large difference in their natural fluctuation timescale. Simulations based on a dynamical model for autonomous circuits composed of low-barrier nanomagnets show close agreement with the experimental results.