Department of Computer Science & Engineering

Simultaneous Multithreading (SMT) architectures are appearing in commercial processors, yet there is still relatively little support for sampling or determining where to simulate to achieve representative simulation results. The challenge in creating a sampling approach to SMT is determining how far to fast-forward each individual thread between samples. Determining how far to accurately fast-forward each individual thread will vary as the threads execute through different phases of execution, and between different architecture configurations. In this paper, we examine using individual program phase information to guide simulation for Simultaneous Multithreading. This is accomplished through creating what we call a Co-Phase Matrix. The co-phase matrix represents the performance and throughput of the potential combination of the phase behavior found in multiple programs when run together. The co-phase matrix is populated by collecting samples of the program's phase combinations, and is used to to guide how far to fast-forward between samples. We show for a handful of SPEC program combinations that using the co-phase matrix provides an average error rates of 2.2% while replacing most detailed simulation with fast-forwarding.

Pre-2018 CSE ID: CS2003-0771