Donald Bren School of Information and Computer Sciences

Increased complexity of micro-electronic systems demands a need for efficient system level models. System level models can provide detailed architectural simulation results to make architectural tradeoffs in the early stages of the design process. For effective system-level design, there is a need for an efficient co-simulation model for precise and speedy system level simulation and design exploration. Recently. several object-oriented language based co-design frameworks have been proposed for hardware modeling at the system-level. In this paper, we focus on modeling concurrency in these frameworks and how it can be used to improve the efficiency of system-level simulation. Specifically, we examine the use of threads to implement process concurrency and compare against non-threaded implementations using function calls. This distinction is important because it determines the choice of the class (e.g., synchronous/asynchronous processes, blocks etc) to use for specification of a given system block or behavior. Although, it is a commonly held belief that usage of threads might slow down the simulation perfomance due to context switch overheads, our analysis and experiments show, that by judicious choice of the threading model, and by striking a balance between the usage of threads and function calls in a system model, one can improve the simulation speed. Hardware designs being inherently concurrent. it is very important to be able to express concurrency in co-simulation models without compromising simulation efficiency. Hence our methodology is based on analysing the concurrency in the model before expressing them in a high level language. To demonstrate the simulation effectiveness, we present an architectural model of a system with adaptive memory hierarchy and demonstrate the effect of modeling choices on the overall simulation efficiency.