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Dynamic Thermal Management of Transistors using Holey Silicon-Based Lateral Thermoelectric Cooler

Abstract

While the state-of-the-art commercial microelectronic device has achieved a technology node as small as 5nm and even below 5nm, most conventional thermal management techniques are limited to the macroscale level. The serious self-heating effect in micro- and nano-scale transistors necessitates the development of advanced cooling techniques to address the increasingly demanding yet delicate thermal management challenges. In this thesis, we present a novel lateral thermoelectric cooler based on holey silicon that enables dynamic thermal management in microelectronic systems. This holey silicon-based lateral TEC exhibits exceptional TEC cooling performance and is compatible with the conventional microfabrication process, allowing for direct integration into chip architecture and creating an all-in-one package system. In the subsequent chapters, a comprehensive investigation of the transistor-TEC system is conducted through 2D and 3D simulations using the COMSOL Multiphysics platform. The power transistor (LDMOS) is considered as the cooling object to explore the feasibility of utilizing holey silicon-based lateral TECs for dynamic thermal management in both spatial and temporal domains. Initially, a parametric study under steady-state conditions examines the influence of various geometrical parameters, boundary conditions, and material properties on TEC cooling performance. Subsequently, a transient TEC analysis investigates its cooling capabilities when employing transient TEC current pulses for managing constant heat fluxes and transient heat pulses. Finally, a comparative study of three different array designs is performed to evaluate their effectiveness in achieving efficient spatial thermal management. In summary, this thesis demonstrates significant advancements in holey silicon-based lateral TECs' cooling performance while showcasing their potential for dynamic thermal management in space and time. Additionally, it provides valuable insights into optimizing the TEC design and lays the foundation for future fabrication and experimental endeavors.

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