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Design and Implementation of Configurable Short-circuited SIW Coax Filter and Sideband Suppression Methods

  • Author(s): Hung, Shang-Yu
  • Advisor(s): Li, Guann-Pyng
  • et al.
Creative Commons 'BY-NC-ND' version 4.0 license
Abstract

According to the literatures and our previous publication, recent researches on bandpass filter design often puts emphasis on configurable center frequency (fc), controllable bandwidth, and multiple moveable notches. However, such designs are frequently inflicted by unwanted stopband transmissions. When such a transmission is too close to the center frequency, it will impact the receiver performance. Especially for the modern receiving modules, unwanted transmission may cause de-sense in other bands.

Proposed novel substrate integrated waveguide (SIW) short-circuited coax (SCC) filter demonstrates a passband that has transmission zeros on both the upper and the lower stopbands; therefore, rejections near the passband are greatly improved. Such a filter is inherent with good out-of-band rejection up to three times of the fc. In the design, there are four signal paths from the input port to the output port. The signal routings are done by the slotlines on the top metal layer. Two sets of surface-mount capacitors on the bottom metal layer are used to configure the passband, one set is frequency control capacitors (CFreq) while another set is enhance coupling capacitors (CE). The center frequency of the passband can be determined by CFreq, and the transmission zero on the lower-end can be tuned by CE. The phase delay of the signal routings are investigated individually as a way to explain the generation of the transmission zeros around the passband.

To minimize the discrepancy between the ideal simulation and the realization, the structure of the simulated filter from ANSYS High Frequency Structure Simulator (HFSS) can be exported as a touchstone file. Such a file can be later connected to the capacitors’ two-port touchstone files provided by the vendor in the Advanced Design System (ADS) circuit simulator. Thereby, simulation results including all the parasitic components from the capacitor can be emulated the real-world measurements.

Due to the fact that the parasitic inductance of the capacitor can trigger resonance above the passband, and degrade the stopband rejection significantly. Multiple parallel capacitors are used to replace the single standalone capacitor in each capacitive loading, such that the equivalent parasitic resistance and the parasitic inductance are further reduced. As a result, inband loss as well as stopband spurs can be minimized. The result of proposed filter design demonstrates a targeted passband centered at 4.84 GHz, with better than 30-dB rejection up to 3fc, and has insertion loss of 2.11 dB and the 3-dB bandwidth of 0.46 GHz.

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