UC Irvine

While thermal management of nanoscale electronics is becoming more challenging, recent advances in thermoelectric materials are renewing interest in developing solid-state cooling devices based on the Peltier effects. In particular, a thin silicon membrane with vertically-etched holes, which are known as holey silicon (HS), has attracted much attention by showing thermal conductivity reductions beyond the prediction of classical models. Furthermore, the thermal conductivity reduction has been achieved without losing the excellent electrical properties or other practical attributes of silicon. Despite the great potential of holey silicon as a thermoelectric material, which has been demonstrated in the previous fundamental studies in the literature, its impact on thermoelectric cooling applications or the connections of fundamental material properties to device-level cooling performance have not been studied in detail. Here, we evaluate the use of holey silicon as a thermoelectric cooling structure by combining analytical models predicting the size dependent transport properties with a finite-element thermoelectric device model. Our analysis demonstrates a great potential of holey silicon for cooling electronics and attributes the remarkable performance to the unique thermal conductivity anisotropy.

When the cross-plane and in-plane thermal conductivities of holey silicon are anisotropically modeled at 40 Wm-1K-1 and 2 Wm-1K-1, respectively, the cooling effectiveness of holey silicon is estimated 200% higher than that of nanostructured-silicon that is modeled isotropically at 2 Wm-1K-1 or even about 20% higher than that of bulk silicon that is modeled at 110 Wm-1K-1. These results are in contrast to the common perception of simply preferring high thermal conductivity materials for thermal management or low thermal conductivity materials for thermoelectric applications. This work presents the anisotropic holey silicon as an efficient thermoelectric material that can offer transformative solutions to thermal management of nanoscale electronics.