UC San Diego

The inevitable migration to deeply-scaled technology nodes forces special considerations on high-power, low-noise, and high spectral purity integrated circuits. The dissertation addresses these considerations for a wide spectrum of RF, mm-waves, and optical-wireline circuits in advanced CMOS SOI technologies. The major contributions are in distributed power amplifiers (DPAs), optical drivers, RF and mm-wave voltage controlled oscillators (VCOs), mm-waves low-noise amplifiers (LNAs), and high linearity mixers.

The work in power amplifiers culminated in the design and measurement of several novel ultra-wide-band DPAs/drivers with 100+GHz of bandwidth (BW) in GlobalFoundries 45nm RFSOI technology. Several design techniques are introduced to break the gain-bandwidth (GBW), and power-BW trade-offs in conventional distributed designs. The first PMOS-only DPA with 100+GHz BW is demonstrated exploiting the decreasing gap between NMOS and PMOS performance in deeply-scaled technology nodes. Transistors stacking is exploited for high power while introducing two new stack compensation techniques, the multi-drive intra-stack and inter-stack coupling. Improved stability coupling networks and magnetic field confining transmission lines are also devised to allow high gain stable operation. Over 4.5 THz GBW is recorded from a cascaded DPA and over 100 Gb/s is measured in both 64-QAM and PAM-4 modulations for a CMOS modulator driver.

The mm-wave 5G LNAs contributions focus on K/Ka bands designs for next generation phased-array systems and exploits the body-bias of fully depleted SOI devices to control the linearity and gain of LNAs in 22nm FDSOI technology.

The efforts in RF and mm-waves LC VCOs focus on implementations in deeply scaled 22nm FDSOI technology node. New circuit techniques are proposed to allow ultra-low-voltage operation (sub 0.1 V), low flicker noise variability across the tuning range without a dedicated tuning for the common-mode, ultra-low phase noise while using thin-oxide only devices, and over 70% of tuning range spanning the X and Ku-bands.

The work in high linearity mixers exploits the enhancement of the figure of merit of CMOS switches in new technology nodes, to implement all-passive 16-path harmonic-reject mixers with watt-level IIP3 and over 35 dBc harmonic rejection ratio for all harmonics up to 3 GHz.