UC Irvine

Design and fabrication outsourcing has made integrated circuits vulnerable to malicious modifications by third parties known as hardware Trojan (HT). Over the last decade, the use of side-channel measurements for detecting the malicious manipulation of the chip has been extensively studied. However, the suggested approaches mostly suffer from two major limitations: reliance on trusted identical chip (e.i. golden chip); untraceable footprints of subtle hardware Trojans, which remain inactive during the testing phase. To overcome these shortcomings, we propose a novel idea of maintaining a dynamic model of the integrated circuit throughout its life cycle to detect HT that might have been injected anywhere in the supply chain. In this thesis, we thoroughly investigate post-silicon HT detection through side-channel analysis using various machine learning models. In this regard, we gather a comprehensive dataset of power and Electromagnetic (EM) side-channel signals for hardware Trojan benchmarks from Trust Hub \cite{tehranipoor2016trusthub} benchmarks to develop a statistical model of the chip for HT detection. We release our collected power and EM side-channel signals for various HT benchmarks as a public dataset in \cite{dataset}. Afterward, we explore many machine learning models and various techniques that eventually lead to three approaches for golden chip-free HT detection and HT detection models that outperform the existing methods. Our two recently published papers \cite{HTM,HTnet} are also developed based on this dataset, and they provide further ideas on how to use the dataset to construct an HT detection model.