Analysis and Implementation of an Internal Signal Amplification Mechanism in Amorphous Silicon
- Zhou, Jiayun
- Advisor(s): Lo, Yu-Hwa
This dissertation reports an internal signal amplification mechanism for light detection, cycling excitation process (CEP). This mechanism relies on the localized bandtail states which involve Auger excitation process and k-selection rule relaxation. There were many previous works showing attractive characteristics of CEP devices, including high detection efficiency, low noise, high speed, low operation voltage, etc. This work mainly demonstrates the experimental characterization and physical models for the amorphous silicon (a-Si) CEP detectors. CEP mechanism has the fundamental difference from impact ionization in all APDs. One of the significant differences is its intrinsically athermalized performance. The temperature sensitivity of the standard a-Si CEP detectors from 200 K to 350 K is found to be nearly temperature independent. This athermalized multiplication characteristic in a-Si CEP detectors offers significant advantages over the impact ionization process in conventional APDs. Temperature sensitivity is a key consideration for detector arrays with readout circuits in LiDAR and imaging applications. The athermalized property can tolerate large temperature variations to achieve stable gain and photon detection efficiency, as well as low pixilation noise with the relaxation of precise temperature control. The detection range of CEP devices can be designed for certain wavelengths by assembling a proper absorption medium. An innovative design of an uncooled high-performance, longwave-infrared quantum detector made of an a-Ge layer and an a-Si layer is demonstrated. The photoexcitation mainly occurs in a-Ge and then the carriers can transport to the a-Si layer for multiplication. This detector has the highest detectivity among the reported room-temperature LWIR quantum detectors and the NEP value sets the world record. This LWIR quantum detector has great potential to meet the performance and cost requirements for many applications: night vision, robotic and machine vision, medical imaging, remote sensing, etc. Finally, the first stage of the CMOS compatible process development for several CEP detector structures is accomplished. The characterization of a-Si deposition by CMOS foundry works in parallel with the design of the hybrid process: incorporating CMOS process and laboratory process. The hybrid process flow for both parts has been demonstrated with the sample layout set for singular device designs and pixel arrays.