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A Fully-Synchronous Multi-GHz Analog Waveform Recording And Triggering Circuit

  • Author(s): Prakash, Tarun
  • Advisor(s): Kleinfelder, Stuart
  • et al.
Creative Commons Attribution-NonCommercial 4.0 International Public License
Abstract

The Antarctic Ross Ice-shelf Antenna Neutrino Array (ARIANNA) experiment is designed to detect ultra-high energy (UHE) neutrinos produced by the collisions of cosmic rays with the cosmic microwave background (CMB). A new single board data acquisition (DAQ) system was deployed as an instrumentation solution for the ARIANNA experiment and the heart of this new DAQ system is the Synchronous Sampling and Triggering (SST) integrated circuit. This dissertation focuses on the design and performance of the SST chip and a second experimental chip (SST0.18u) in an attempt to scale down and investigate design techniques to reduce fixed pattern noise.

The Synchronous Sampling and Triggering circuit can be dubbed as an "oscilloscope on a chip with triggering capabilities". Fabricated in 0.25u CMOS process, the SST contains 4 channels of 256 samples per channel. The chip has 1.9V input range on a 2.5V supply, 12 bits of dynamic range and an analog bandwidth of 1.5 GHz. The sampling clocks are generated synchronously via a circular array of high speed shift registers driven by an external LVDS oscillator. The SST can operate in wide range of sampling speeds with rates spanning over 6 orders of magnitude (2 k-samples/s to 2 G-samples/s). The SST was designed for simplicity of operation, only three active control signals are necessary for its operation. Each individual channel has a very sensitive real-time dual threshold triggering circuitry with windowed coincidence features to detect very small and fast impulse signals. The circuitry is capable of discriminating signals with ~1mV RMS resolution at >600 MHz bandwidth. Triggering options include, direct readout of comparator results or exclusive triggering on dual threshold crossing with adjustable time window. After calibrating for the fixed pattern timing noise, the SST achieves a timing resolution of 2.1 ps.

Fabricated in 0.18u RF CMOS process, a second chip (SST0.18u) was developed to reduce the fixed pattern sampling interval error. The SST0.18u contains 4 channels of 512 samples per channel. The chip achieves a sampling speed of 3 G-samples/s with analog bandwidth of 1.2 GHz. It has a 900 mV input range on a 1.8 V power supply. The fixed pattern timing noise is characterized by stochastic zero-crossing method and the RMS value of the sample interval error is 8.28 ps.

Equipped with the SST analog waveform recording and triggering chip, the new data acquisition system has been successfully developed and deployed in the Antarctica's Ross Ice Shelf. The DAQ systems are actively monitoring for short radio Cherenkov pulses since 2014-15 austral summer.

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