Donald Bren School of Information and Computer Sciences

SpecC methodology of the system design consists of four major hierarchical levels: specification, architecture, communication, and implementation. The SpecC Profiler is a high-level process within the SpecC methodology, which analyzes system design at the specification level. To achieve fast profiling with satisfactory accuracy, the SpecC Profiler relies on simulation and front-end compiler tools. Each subpart of the specification-level design is associated with the profiling information, targeting computational complexity, storage requirements, and communication complexity of the specification design. In addition, SpecC Profiler predicts the performance, such as number of instructions or execution time.

This report describes the profiler architecture and implementation. The accuracy of the profiler is asserted by comparing the performance predicted by the profiler with the results of simulated execution of different applications, like JPEG and Vocoder.