UCLA

Fault-tolerant quantum computing is built upon high-fidelity universal quantum gates enabled by scalable quantum processors. However, the scalability of microwave-based quantum processors is hindered by large layout pitch size of 1mm due to high-Q resonant circuits and for crosstalk reduction. We therefore choose to work on the more scalable dc-pulse-based quantum processor utilizing the position-based double-quantum-dot charge qubit with a 200nm pitch.To alleviate prior difficulty encountered in transmitting fast-edged waveforms generated by arbitrary waveform generators via meter-long cables, we propose a scalable architecture to partition the quantum controller and house only its low-power output stage with the qubit chip within low-parasitic packaging. To enable high-fidelity universal single-qubit gates, we derive requirements for the precision of control waveforms, propose temperature-insensitive design methodologies without device models at cryogenic temperatures, and develop an inductor-less, precise, and fully integrated dc-pulse-based quantum controller achieving 4.3ps maximum error in pulse width and highly linear pulse height control. A closed-loop, automated, multi-variable calibration using an on-chip 2ps/step pulse-swallowing cyclic TDC is devised to ensure temperature-insensitive performances. Our quantum controller prototype is fabricated in 28nm bulk CMOS and verified through measurements down to 77K. Comparing the performance with state-of-art dc-pulse-based quantum controllers, our work has reduced the shortest duration of a pulse by over 3X, improved the linear resolution of width tuning by over 40X, reduced the width uncertainty by three orders of magnitude, realized an on-chip high-precision pulse width calibration, and largely improved the precision of height tuning to enable high-fidelity universal single-qubit gates.