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Fluxless Bonding Processes Using Silver-Indium System for High Temperature Electronics and Silver Flip-Chip Interconnect Technology

  • Author(s): Wu, Yuan-Yun
  • Advisor(s): Lee, Chin C.
  • et al.
Abstract

In this dissertation, fluxless silver (Ag)-indium (In) binary system bonding and Ag solid-state bonding are used between different bonded pairs which have large thermal expansion coefficient (CTE) mismatch and flip-chip interconnect bonding application. In contrast to the conventional soldering process, fluxless bonding technique eliminates contamination and reliability problems caused by flux to fabricate high quality joints. Due to large CTE mismatch, high quality joints are important to manage the shear strain which develops in the bonded objects. Besides, the resulting Ag and Ag-In joints have relative high melting and operating temperature which can be utilized in high temperature packages. There are two section are reported. In the first section, the reactions of Ag-In binary system are presented. In the second section, the high melting temperature, thermal and electrical conductivity joint materials bonding by either Ag-In binary system bonding or solid-state bonding processes for different bonded pairs and flip-chip application are designed, developed, and reported.

Our group have studied Ag-In system for several years and developed the bonding processes successfully. However, the detailed reactions of Ag and In were seldom studied. To design a proper bonding structure, it is necessary to understand the reaction between Ag and In. The systematic experiments were performed to investigate these reactions. A 40 um Ag layer was electroplated on copper (Cu) substrates, followed by indium layers of 1, 3, 5, 10, and 15 um, respectively. The samples were annealed at 180 °C in 0.1 torr vacuum. For samples with In thickness less than 5 um, the joint compositions are Ag2In only (1 um) or AgIn2, Ag2In, and Ag solid solution (Ag) after annealing. No indium is identified. For 10 and 15 um thick In samples, In covers almost over the entire sample surface after annealing. Later, an Ag layer was annealed at 450 °C for 3 hours to grow Ag grains, followed by plating 10 um In and annealing at 180 °C. By annealing Ag before plating In, more In is kept in the structure during annealing at 180 °C. Based on above results, for those designs with In thinner than 5 um, the Ag layer needs to be annealed, prior to In plating in order to make a successful bonding.

In this section, we further studied the Ag-In bonding and solid-state bonding for different bonded pairs and flip-chip application. For the silicon (Si) and aluminum (Al) pair, Al has been used as the material for interconnect pads on the ICs. However, its high CTE (23 × 10-6/°C) and non-solderable property limit its applications in electronic products. To overcome these problems, a fluxless Ag-In bonding was developed. Al was deposited Cr/Cu layer on the surface by E-beam evaporator to make it solderable. 15 um of Ag and 8 um of In were sequentially plated on the Al substrates and 15 um of Ag was on Si chips with Cr/Au coating layer. The bonding was performed at 180 °C in 0.1 torr vacuum. The joint consists of Ag/(Ag)/Ag2In/(Ag)/Ag. The joint can achieve a solidus temperature of beyond 600 °C. From shear test results, the shear strengths far exceed the requirement in MIL-STD-883H. Al is not considered as a favorable substrate material because it is not solderable and has a high CTE. The new method presented in this thesis seems to have surmounted these two challenges.

Since Ag2In is weak inside the joint in Ag-In system, an annealed process was used to convert the joints into Ag solid solution (Ag) to increase the joint strength and ductility. Two copper (Cu) substrates were bonded at 180 °C without flux. Bonding samples were annealed at 200 °C for 1,000 hours (first design) and at 250 °C for 350 hours (second design), respectively. Scanning electron microscope with energy dispersive X-ray (EDX) analysis results indicate that the joint of the first design is an alloy of mostly (Ag) with micron-size Ag2In and Ag3In regions, and that of second design has converted to a single (Ag) phase. Shear test results show that the breaking forces far exceed the requirement in MIL-STD-883H. The joint solidus temperatures are 600 °C and 800 °C for the first and second designs, respectively. The research results have shown that high-strength and high temperature joints can be manufactured using fluxless low temperature processes with the Ag-In system and are valuable in developing high temperature package.

For real applications, a serious concern is the long-term reliability of the joints under thermal stress caused by CTE mismatch between the chip and the package. Thereby, the reliability of Ag-In joints in thermal cycling (TC) environment is assessed. Si chips and Cu substrates were bonded at 180 °C without flux, and then annealed at 250 °C to convert the joint into an alloy of intermetallic grains and (Ag). Si-Cu pair is chosen because of the large CTE mismatch. Two TC tests were performed. 10 samples were examined from -40 °C to 85 °C for 100 cycles first and -40 °C to 200 °C for 5,000 cycles later. Seven of ten samples survived beyond 5,000 cycles. Based upon these results, the Ag-In joints not only have high melting temperature but also can survive harsh TC environment.

To further investigate other alternative bonding method, the solid-state atomic bonding technique is introduced. High quality joints are crucial to bonding materials with CTE mismatch since shear stress develops in the bonded pair. Since stress concentrated at the voids in these joint, the breakage probability could increase. In addition, intermetallic compound (IMC) formation between the solder and under bump metallurgy (UBM) is essential for interconnect joint formation in the conventional soldering process. However, the interface between the IMC and solder is shown to be the weakest interface that tends to break first during thermal cycling and drop tests. Thus, we developed a solid-state bonding process along with ductile joint materials that no molten phase was included. Thus, the IMC and its related issues are eliminated.

In the first bonding experiment, 10 um Ag layer with cavities were produced on the Si chips with Cr/Au coating layer and then bonded to the Cu substrates at 300 °C with 1,000 psi (6.9 MPa) static pressure in vacuum. Due to cavities, the bonding pressure can be reduced to 600 psi (4.1 MPa). No underfill or flux is needed. From cross-section SEM images, Ag joints are well bonded between Si chips and Cu substrates. The shear test results show that bonding strengths pass the MIL-STD-883H, except one sample. It eliminates a concern from the bonding strength for practical applications.

Due to the miniaturization of large-scale-integration of circuits on Si chip technology, the joint size and the pitch of the flip-chip joints have to be scaled down. As the joint shrinks, reliability issues and manufacturing difficulties emerge. One of these difficulties is elevated shear strain due to the increase of the intermetallic compound (IMC) layer ratio. Therefore, we demonstrated the Ag flip-chip interconnect process using solid-state bonding at 250 °C with a static pressure 800 psi in vacuum. Each Si chip has an array of 50 × 50 × 13 Ag flip-chip joints with 20 um in pitch and 10 um joint in diameter on Si chip. No flux or underfill is needed. The cross-section SEM image shows that the Ag flip-chip joints were well bonded to the Cu substrate without cracks. Despite a large CTE mismatch between Si and Cu, no joint breakage is observed. The ductile Ag joint well manage the stress induced by significant CTE mismatch. The melting temperature of joints is 962 °C. Thus, high operating temperature device such as 200-450 °C becomes possible. To further evaluate this, a pull-off-test was performed. The breaking force was 1.5 times larger than the MIL-STD-883H criterion. There are several advantages to this solid-state Ag flip-chip bonding technology: high electrical and thermal conductivities, no IMCs and their related issues, a complete lack of flux, high ductility for managing CTE mismatch between chips and packages, high operating temperature, and possibility for a high aspect ratio of the interconnect.

To figure out the stress-strain of Ag and (Ag) at room temperature and elevated temperature, a typical ingot with 9.5 mm in diameter and 60 mm in length was fabricated. The main ingots were machined into ASTM tensile test samples by EDM. The stress-strain curves of Ag were measured at room temperature, at 221 °C (Th = 0.4), and at 350 °C (Th = 0.5), respectively, where Th is the homologous temperature. For Ag ingot, at room temperature, the yield strength (YS) ranges from 51 to 106 MPa and ultimate tensile strength (UTS) is from 138 to 208 MPa which are comparable with the published data but the elongation (0.27 - 0.49) is about twice of the published value. At higher temperatures, the YS and UTS decrease but elongation varies little. Silver solid solution with 20 at. % In ((Ag)-In20) samples were also measured at room temperature, at 156 °C (Th = 0.4), and at 265 °C (Th = 0.5), respectively. (Ag)-In20 test samples have better results than pure Ag test sample. The YS is 14 MPa which is smaller than pure Ag test sample but UTS (308 MPa) and elongation (0.73) are 1.5 times of pure Ag sample.

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