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Application-Tuned Processor Architectures
Abstract
The performance and resource requirements of every application are unique. Yet most processors are designed to do well, not on a particular application, but instead on the average case over a range of applications. Processors are typically designed around a broad suite of applications so that one piece of hardware can be used in many different contexts. In contrast to this, the continuing expansion of the embedded market has created a significant demand for low-cost high-performance computing solutions that can be buried deep inside products. These embedded processors are typically responsible for the execution of only a small number of applications, which means that it is possible to tune the design of the processor to the needs of the application for which it will be used. Embedded processors not only typically execute a small number of applications, they are also often integrated into the same physical chip as many other components. This level of integration means that the processors are now being sold not as physical silicon, but rather as descriptions which can be combined with other design elements before fabrication. This change in the way that processors are sold provides us with an opportunity to take into consideration specific application behaviors during the physical design of the processor. By customizing a processor to the needs of an application, we can provide faster designs that take less area. In order to make this possible, the customization needs to be realized with a minimum of additional engineering design effort. To this end, this dissertation focuses on novel automated techniques for analyzing program behavior, customizing portions of the processor to an application, making intelligent design tradeoffs, and examining the effect of algorithmic choices on the circuit level realities of their implementation.
Pre-2018 CSE ID: CS2003-0752
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