Over the past 15 years, biologically sensitive field-effect-transistors (bioFETs) employing a nanowire as their active element have become very popular. Each year, many experiments are reported that use nanowire bioFETs to detect and quantify new clinically relevant biomolecules.

This thesis aims to enhance our understanding of bioFETs in order to answer important practical questions regarding the operation and optimization of them.

We discuss the proper biasing of a bioFET in order to maximize sensitivity. Using electrostatic arguments and MATLAB simulations, we offer a recipe for biasing that applies to biomolecule detection using SOI-based FETs, including nanowire and nanoribbon bioFETs. In contrast to previous works, we take into account the two degree of freedom afforded by a solution-gate and a back-gate. We find that such a bioFET is best operated when the channel is fully depleted. This is in line with the findings of others regarding the biasing of bioFETs using a single gate. We also discuss the opportunity to tune an extra degree-of-freedom: the electric charge on the surface of bioFETs that could be brought by other chemical species, such as linker molecules, probe molecules, or surface groups. We show that an optimum value exists for this surface charge. The optimum amount of charge is that which minimizes the electric field at the solution/bioFET interface prior to analyte capture. We show that this optimum is a result of a minimum in Debye screening strength.

We study the electrostatics of a nanowire bioFET as we change the geometry of the nanowire. It is commonly accepted that nanowires with small diameters are more sensitive than larger nanowires because their surface-area-to-volume ratio is larger. We use analytical arguments to show that this analysis is incorrect. Using simulations, we show that analytes captured in concave regions and corners produce a stronger signal due to reduced Debye screening. All structures have such corners, but in small nanowires, these corners are a larger fraction of the entire surface, so the positive effect of the corner is more apparent, leading to higher sensitivity for smaller nanowires.

We discuss the necessity of solution electrodes in the operation of bioFETs. We show that without a solution electrode, the sample solution will capacitively couple to various FET terminals, resulting in an unpredictable bias point, and an unpredictable return path for the bioFET electric field. These effects could adversely affect the reproducibility of bioFET measurements. We use analytical arguments to show that a return path must exist for the electric fields that emanate from the biomolecules and enter the bioFET. We use simulations to show that the uncontrolled capacitive coupling between the sample solution and the bioFET terminals provides this path in the absence of a solution electrode. We also show that slight variations in the structure could affect this capacitive coupling and change the sensitivity in largely unpredictable and unexpected ways. We conclude that either a solution electrode must be present, or the sample solution must be coupled to a terminal using a controlled large capacitance in order to minimize the effect of variations. We also show that lack of a solution electrode can be a source of signal drift in experiments.

Biomolecular assays are biochemical tests used for quantitative measurement of target biomolecular analytes from specimens. This is usually achieved with labelling techniques where target biomolecules were conjugated with labels for signal readout. Label-free assay provides an alternative route to detect target biomolecules without secondary label conjugation. The technique enables high-throughput and real-time measurements of analyte samples which is of primary significance in many biological applications (e.g. drug screening, point-of-care diagnosis).

One promising candidate for real-time label-free biomolecular detection is using field-effect transistor (FET) biosensors. A FET without a gate electrode is designed to detect immunological antigen-antibody binding reactions. Charged target biomolecules are bound with specificity onto biological receptors anchored on the oxide dielectric surface. The induced electric field mediated by oxide dielectric is directly translated into current change without any labeling. Nanowire FET (nwFET) biosensors have been demonstrated to have exceptional biomolecule sensitivity with lower limit of detection (LLOD) down to sub-picomolar range. However, the inherently low output-signal levels are impractical for their use outside of the research lab. In addition, variability issues originated from device fabrication, system integration and during sensing experiment prohibit reliable quantitation of target biomolecules in the scenarios of interest. As a result, label-free biomolecular assays have not been meaningfully adopted and impacted the biomedical and pharmaceutical industry even after decades of intense research.

To boost output signal level of FET sensors, we previously proposed a novel T-shape nwFET (T-nwFET) structure by itself as an integrated sensor-amplifier to amplify output signals at close proximity. However, the concept of T-nwFET as a biosensor has not been implemented in biomolecular detections. In this work, we first understood and improved the sensitivity of T-nwFET biosensors using a signal-to-noise ratio metric, and validated the performance in practical settings. We also investigated theoretical and practical approaches to improve selectivity, which is crucial for accurate quantitation of biomolecules. We proposed a novel per-sensor based calibration scheme to mitigate device-to-device and test-to-test variability. We then developed the T-nwFET into a holistic biomolecular assay platform, SELFA, and its performance was evaluated by implementations in predictive toxicology and clinical studies.

The continued push for microelectronics scaling has driven many changes in modern transistor design, such as the adoption of non-planar, multi-gate architectures (e.g., FinFETs) starting at the 22nm node. It is envisioned that other solutions such as junctionless FETs (JL-FETs), tunnel FETs (TFETs), or heterogeneous materials integration may be needed to sustain the pace of Moore’s law beyond 14nm. To assess the viability of these emerging devices prior to commercial investment, we must consider the impact of process variations such as line edge roughness (LER) and random dopant fluctuation (RDF), both of which are major concerns in the nanoscale regime. The challenges associated with dimensional scaling also compel us to explore heterogeneous integration as a possible end-of-roadmap solution for future micro- and nanoelectronics.

In this dissertation, we first present our findings on the impact of LER and RDF variability on FinFETs, JL-FETs, and TFETs targeted for sub-32nm generations. Using technology computer-aided design (TCAD) simulations combined with physical descriptions by which LER and RDF affect the intrinsic operation of different FETs, we compare the impact of LER and RDF on the emerging candidates of interest. We extend the study to include III-V FETs as well to determine if materials like InGaAs are inherently more or less affected by variability compared to equivalently designed silicon devices. Second, we study how heterogeneous integration (HGI) of different material systems can drive a new approach toward improving circuit and system performance outside of traditional scaling concepts. To this end, we develop a cross-layer evaluation framework (spanning process, device, and circuit-level perspectives) to assess the potential benefits of InGaAs/Ge-based HGI circuits against silicon-only technology. To give credence to the framework, we also present experimental work in developing a nanotransfer printing process to enable feature-level HGI in real-world settings. Third, we present a method to fabricate coplanar supercapacitors onto silicon substrates for integration with microelectronic circuits. Along with experimental demonstrations, we also develop a physical TCAD model to enable simulation-based design exploration and optimization of on-chip supercapacitors for integrated circuit applications.

Ultimately, the insights gained in this study will help guide the semiconductor industry to choose next-generation device technologies which are best suited for commercial adoption with process variability and the potential for heterogeneous integration in mind.

The thesis studies a three-dimensional rectangular hexahedron meshing (3D RHM) single-cell model to explore the cell behaviors for electronic cell-substrate impedance sensing (ECIS). In the model, a spatial network of resistors (R) and capacitors (C) is established to mimic a single-cell measurement system including electrodes, medium and mammalian cells. Unlike the existing ECIS models, which are limited by several approximations for current flow, spreading resistance and cell morphology, the proposed single-cell model is more flexible and enables us to provide high mesh resolution to reconstruct the real circumstances of cell and their surroundings. Moreover, the simulated results by single-cell model match the published measurement and simulation data by Thein and Huang. In addition, it is also demonstrated that the maximum change of total impedance (Z) between 100 Hz to 10 MHz varies based upon changes in cell properties, specifically the size of cell, cell membrane capacitance, cell-electrode distance, and cytoplasm resistivity, which is essential to understand the frequency-dependent cell behaviors.

As CMOS electronics grow ever more ubiquitous and essential to modern life, managing and reducing power dissipation becomes essential. At the device level, this requires new transistors with reduced leakage currents and operating voltages. Opportunities and challenges in this regard arise from quantum transport effects. For instance, novel tunneling field-effect transistors (TFETs) can potentially operate at substantially lower voltages than MOSFETs by utilizing interband tunneling as the conduction process. Conversely, the Moore's law-driven scaling of MOSFETs down to the nanometer regime increases source-drain intraband tunneling, which may limit leakage power in future CMOS. Conventional device models and simulations based on semiclassical concepts are inadequate for describing such effects. In this dissertation, we develop new theoretical models to study tunneling and apply the resulting insights to MOSFET and TFET device design.

To this end, we develop a complete device simulator that uses non-equilibrium Green's functions (NEGF) to rigorously model quantum transport. We utilize a combination of NEGF, full band structure calculations, and analytical derivations to study the physics of interband tunneling in semiconductors. We clarify and improve the accuracy of commonly used analytical tunneling models and extend them to quantum confined structures, which include present and future scaled devices like ultra-thin body (UTB) transistors, FinFETs, and nanowire devices. We merge our findings with electrostatic analyses to derive the first general quasi-analytical current model for TFETs that provides device insight and is easily used for compact modeling. We show that existing TFETs are performance limited by the chemical source doping profiles, a particularly profound problem for III-V p-type TFETs. To overcome these limitations, we propose a new device design, the gate-induced source tunneling FET (GISTFET), which utilizes electrostatic doping to define the tunneling junction and allow for high performing complementary TFET systems. Finally, we derive the first model of source-drain tunneling in MOSFETs and study the effect of contact doping on leakage in scaled devices.

As the relentless scaling of conventional Si CMOS transistors continues, it becomes more and more challenging to further increase device drive current and reduce leakage current and power consumption. III-V multigate non-planar channel transistors have emerged as a promising contender in the post-Si era due to its high carrier mobility and superior electrostatic control of the non-planar structure. For device design, current Technology Computer Aided Design (TCAD) modeling, however, fails to accurately predict device behaviors in decananometer dimensions. Further, for the analog/RF applications, parasitics engineering plays a determining role in an ultrathin body structure but the conventional symmetric source (S) / drain (D) architecture restricts design and optimization versatility. Moreover, for III-V transistors fabrication, the device-level co-integration capability is crucial but still not mature in current technology.

In this work, a systematic methodology is developed to calibrate TCAD hydrodynamic model against Monte Carlo (MC) simulation in the quasi-ballistic regime. Good fits of both IDS-VGS and IDS-VDS curves have been demonstrated at various device dimensions. This methodology facilitates an accurate and time-efficient device simulation. Secondly, we explore a GaAs accumulation mode vertical transistor for asymmetric S/D design and optimization. Separate control of S/D spacer thickness and underlap length can be implemented and their individual impact on analog performance is discussed. Device design guidelines for different analog/RF metrics improvement are presented. Thirdly, we develop a VLSI-compatible top down process with co-integration capability in III-V multigate non-planar channel transistor fabrication. Nanowires are patterned by photolithography and etching of a source substrate and transferred to another receiving substrate by transfer stamping. A VLSI cleanroom tool is used in the transfer process to accurately position nanowires. This technique yields large arrays of aligned GaAs nanowires, and facilitates device-level co-integration of III-V multigate non-planar channel transistors on the same substrate with close proximity and overlay accuracy.

Flash memory is reaching scaling limitations rapidly due to reduction of charge in floating gates, charge leakage and capacitive coupling between cells which cause threshold voltage fluctuations, short retention times, and interference. Many new memory technologies are being considered as alternatives to flash memory in an effort to overcome these limitations. Ferroelectric Field-Effect Transistor (FeFET) is one of the main emerging candidates because of its structural similarity to conventional FETs and fast switching speed. Nevertheless, the performance of FeFETs have not been systematically compared and analyzed against other competing technologies.

In this work, we first benchmark the intrinsic performance of FeFETs and other memories by simulations in order to identify the strengths and weaknesses of FeFETs. To simulate realistic memory applications, we compare memories on an array structure. For the comparisons, we construct an accurate delay model and verify it by benchmarking against exact HSPICE simulations. Second, we propose an accurate model for FeFET memory window since the existing model has limitations. The existing model assumes symmetric operation voltages but it is not valid for the practical asymmetric operation voltages. In this modeling, we consider practical operation voltages and device dimensions. Also, we investigate realistic changes of memory window over time and retention time of FeFETs. Last, to improve memory window and subthreshold swing, we suggest nonplanar junctionless structures for FeFETs. Using the suggested structures, we study the dimensional dependences of crucial parameters like memory window and subthreshold swing and also analyze key interference mechanisms.

Field-effect transistor (FET) based biosensors have emerged as a promising candidate to provide quick, convenient, accurate, and label-free biological analytes quantization outside conventional laboratories. They sense intrinsic charges carried by the target analytes and therefore avoid time-consuming sample labeling processing. Label-free detection of the specific target analytes is achieved by coupling immunological receptor probes with FET. They specifically capture the target analytes, change the surface charging state, and the underlying transistor transduces such surface charge into electrical signals that could be directly fed to an electronic readout system. Over the past decades, FET-based biosensors have demonstrated high sensitivity and low limit of detection (LLOD) in detecting a plethora of targets, including proteins, volatile organic compounds, nucleotides, and viruses. Measurement uncertainties, the fluctuation of the measurable quantities, are crucial for high-performance biological assays. It must be kept small enough to allow the signal from ultra-low concentration target analytes to stand out of the background. Measurement uncertainties in FET-based biosensors originate from multiple sources, including noise, device instability, device-to-device variation, sample preparations, etc. Among these sources, noise sets a fundamental lower limit of fluctuations for a specific device and shall be minimized. Meanwhile, other factors may contribute more significant measurement uncertainties than the characterized noise limit in practical analytical assays. The lack of understanding and control of the measurement uncertainty sources becomes one critical challenge preventing FET-based biosensors from generating larger impacts in the biomedical industry despite their tremendous success in research laboratories.

This dissertation is to enhance our understanding of measurement uncertainties in FET-based biosensors and propose strategies to mitigate them. In the first part of this work, we analyzed the low-frequency noise of dual-gated silicon field-effect transistor (DG-FET) biosensors with Schottky contacts. We found the flicker noise at the sensing insulator-semiconductor interface to be the major noise source while employing Schottky contacts to have minimal noise contribution with a sufficiently large back-gate bias voltage. The measured noise dependence on transconductance further indicated the presence of non-uniform energy distribution of interface trap density at the said sensing interface. Based on these findings, we argued that the DG structure is advantageous over its single-gated (SG) counterpart – although they possess the same intrinsic LLOD, the former could offer a larger signal gain at the optimum LLOD thanks to sufficient channel carrier supply through back-gating instead of biasing the sensing interface toward band edge with higher trap density. In the second part of this work, we studied the instability of the same DG-FET biosensor. FET biosensors are exposed to electrolyte solution and therefore more prone to device instability issues like characteristic drifting compared with conventional devices used in integrated circuits (IC), which are often well passivated from the ambient. Such time-varying behavior leads to a longer waiting time to stabilize the sensor as well as larger measurement uncertainties if multiple measurements are conducted. We analyzed the instability behavior observed in DG-FET sensing experiments and hypothesized it was a result of redistributed protons inside dielectrics at the silicon/oxide interface of the back-gate. Two improved measurement techniques, pulsed IV and pulse resetting, were proposed and demonstrated to mitigate their effects in the measurement data.

In the third part of this work, we examined the nonlinearity in FET-based binding assay response. While the dose-response curve of an affinity-based bioanalytical assay generally shows a nonlinear relationship, any distortion due to the FET transducers has not been well understood. We showed that the nonlinear transduction mechanism of FET sensors plays an important role in shaping their dose-response curves when operating in the nonlinear regime. Negligence of such nonlinearity would introduce errors in the extracted affinity properties of the analyte-receptor pair. This work provides useful guidelines for designing FET-based binding assays and interpreting their measurement data.

A biological cell is the elementary unit of life. Despite being actively studied for the last three centuries, many details of how cells are organized remain mysterious. One of the reasons in conventionally accepted optical microscopy that imposes high costs on experimental studies, limits scalability, and slows down the progress. In order to address this, numerous label-free imaging techniques were proposed by the biomedical engineering community. Among them is electrical impedance tomography (EIT), a low-cost and label-free imaging method based on electrical stimulations. Mathematically, EIT is ill-posed which severely limits its applications. Moreover, it was initially developed for human thorax imaging and its micro-scale version is yet to be established. In this dissertation, we shrink EIT for single-cell applications and demonstrate how to image a cell and its interior organelles using only a few microelectrodes.

We start by studying electrical properties of cells and build a scalable model of cellular electrical response. The proposed method mimics biodiversity among four common cell types and accurately represents complex three-dimensional geometries. By combining it with modern shape optimization methods and a customized microelectrode array we extend EIT to single-cell imaging. Along the way, we provide solutions to several well-known EIT problems such as low contrast images and numerical instability. To further expand cellular EIT to nucleus imaging we take a data-driven approach. We explore a variety of machine learning methods previously applied to inverse imaging problems and discuss their pros and cons. We then propose a novel deep learning model specifically adjusted for EIT. Finally, we evaluate and experimentally demonstrate live cell nucleus imaging, driven by pure electrical excitations and the proposed deep neural network.