UC Berkeley

Power electronics that are extremely energy efficient and power dense are becoming increasingly required for critical applications such as data center power delivery, renewable energy, and electric transportation. This dissertation primarily investigates a power conversion topology which leverages physical scaling laws to achieve higher performance power conversion, the flying capacitor multilevel (FCML) converter. The FCML converter utilizes low voltage semiconductor switches and energy dense capacitors to enable more energy efficient and more power dense converters. Successful FCML converter operation, however, is contingent upon the flying capacitor voltages within the converter being at well-defined voltages (so called balanced flying capacitor voltages). If the balanced flying capacitor voltage distribution is not maintained, switch voltage stress and inductor volt-second stress are significantly increased. This thesis addresses the problem of flying capacitor voltage balance through several avenues. First, the impact of the semiconductor switch parasitic output capacitance Coss on the flying capacitor voltage balance is elucidated through analytical modeling. The charge flow quantities induced by the switch Coss are found to have a naturally balancing effect on the flying capacitor voltages. Second, active flying capacitor voltage balancing controllers are developed for applications where the flying capacitor voltage requirement is particularly challenging to adhere to. These applications require flying capacitor voltage references which vary at hundreds of volts and at frequencies in the hundreds of hertz, an atypical and hard to achieve requirement. Finally, recommendations for future directions of research are provided.