Securing Processors from Time Side Channels
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Securing Processors from Time Side Channels

Abstract

SoCs are required to maintain information private when requested by the Operating System (OS) or the application. From a high level point of view, there are time domains, typically processes or threads, and there should be no time information leak between them. At the same time, cores inside SoCs are supposed to be fast levering many predictors and resource sharing for efficiency. Using predictors like caches and branch predictors can have side effects that leak information across time domains. Specifically, the challenge is that the code executed by one time domain affects the performance of another. This time impact information leak can be exploited as a side channel attack. The goal of this work is to classify the different side channel \textbf{time} information leaks that result from different predictors available in typical high performance cores. The work focuses on side channels that result of changes in execution time, not other side channels like Electro-Magnetic Interference. The proposed classification points that time side effects or leaks can be due to program data, address, program counter, or just execution time. Each of those information leaks can happen during the speculative or the non-speculative execution. This work also goes over all the predictors in current out-of-order cores, and shows mechanisms to avoid the time-based information leak.

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