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High-Power CMOS SOI Switching and Applications in RF Signal Processing

Abstract

In-band full duplex (IBFD) for increased spectral efficiency but is limited by self-interference (SI) from the transmitter to the receiver. A combination of antenna-isolation, circulators, analog cancellation, and digital cancellation can achieve high levels of SI cancellation,

but is still not enough to enable high-sensitivity IBFD operation. An additional layer of cancellation can be added in the code-domain. RF code-domain DSSS-CDMA approaches have been shown to add an additional 40-50 dB of SI cancellation. However, in order to make code-domain techniques compatible with other SI cancellation techniques, the interface must be RF-invisible and placed directly at the antenna interface. This requires RF-signal processing techniques in both the TX and RX paths of the tranceiver. This work focuses on the development of high-power, high modulation bandwidth switches in cost-effective CMOS SOI processes which enable the transmitter side of code-domain SI without interfering with other self-interference cancellation techniques. First, theory groundwork of trade-os between linearity, power-handling, and insertion loss in CMOS switches will be discussed. Then a variety of modulators based on this theory with fractional bandwidths (FBWs) approaching 50% and power handling of up to 40 dBm will be explained. Next, signal processing techniques to reduce unnecessary out-of-band (OOB) emissions will be given. Finally, the applications of these techniques in full-duplex systems, and further applications are discussed.

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