Climate change is arguably one of the most pressing challenges facing humanity in the 21st century. Over the past three decades, substantial progress has been made in characterizing the changes in earth's mean climate state under a range of global warming scenarios. However, individuals and governments across the world are now interested in \emph{changes to the extremes} of the climate system. The tails of the distribution, typically associated with extreme weather patterns such as tropical cyclones, atmospheric rivers and extra-tropical cyclones are highly impactful, and cause major disruption to human life, property and economy. This thesis makes an attempt to address the following question: \emph{How will extreme weather events change in the future?}

In order to address this question, we first need to address how extreme weather events are identified in climate datasets. For over four decades, climate analysts have applied heuristics on spatial and temporal summaries of complex datasets to identify events. This thesis makes the following major advances in bringing the field of climate analytics to the 21st century: First, we develop the TECA (Toolkit for Extreme Climate Analytics) framework and enable heuristic-based analysis of O(10) TB datasets in 10s of minutes. Second, we introduce Deep Learning to the climate science community, and showcase state-of-the-art results in pattern classification, detection and segmentation. Our Deep Learning implementations have been scaled to the largest CPU- and GPU-based HPC systems in the world; these achievements being recognized by the ACM Gordon Bell Prize in 2018.

Powered by these new capabilities, we characterize changes in the frequency and intensity of tropical cyclones, atmospheric rivers and extra-tropical cyclones in a variety of historical, reanalysis and climate change runs. Deep Learning-powered segmentation provides us with the capability to conduct precision analytics of precipitation \emph{conditional} on these weather patterns. We report on thermodynamic and dynamic mechanisms behind changes in extreme precipitation.

Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline validation, where the functionality of an existing pipelined processor is, in essence, reverse-engineered from its RT-level implementation. Our approach leverages the system architect's knowledge about the behavior of the pipelined architecture, through Architecture Description Language (ADL) constructs, and thus allows a powerful top-down approach to pipeline validation. This report addresses automatic validation of processor, memory, and co-processor pipelines described in an ADL. We present a graph-based modeling of architectures which captures both structure and behavior of the architecture. Based on this model, we present formal approachesfor automatic validation of the architecture described in the ADL. We applied our methodology to verify several realistic architectures from different architectural domains to demonstrate the usefulness of our approach.

Software quality is increasingly becoming a differentiator between software products. Thisresulted in the development of new and improved approaches to software development like object-orientation and the development of software metrics to better manage the process of software development. Analyzing a large collection of software projects that use object-oriented programming in terms of object-oriented design quality metrics that measure the size, complexity, performance and quality of software could give us a good idea of how object-oriented programming is used in practice. Analyzing software projects on the extreme ends of the distributions of these metrics could give us specific examples of coding practices which influence design qualities. This analysis can be used to inform machine learning models that estimate code quality based on design metrics.

In this thesis, I generated a repository containing the latest version of 226,793 softwareprojects taken from the Maven Central Repository. I statically analyzed each of these projects and measured 18 class-level design quality metrics for 10,608,920 classes and 8 package-level design quality metrics for 2,107,577 packages. I analyze the outlier projects in terms of object-oriented design quality metrics and evaluate their suitability for inclusion in training sets for machine learning models.

Recent efforts in language-driven Design Space Exploration (DSE) use Architectural Description Languages (ADL) to capture the processor-memory architecture, generate automatically a software toolkit (including compiler, simulator, assembler) for that architecture, and provide feedback to the designer on the quality of the architecture. While some of these approaches capture the simple cases of hazards and interrupts in ADL, to our knowledge no previous approach has an explicit way of describing hazards and multiple exceptions for a wide variety of processors and memory architectures. In this report, we present a clean and uniform way of specifying hazards and exceptions in EXPRESSION which supports exploration and validation of programmable embedded systems. We present the study of interrupts and exceptions for Power PC, MIPS R10K, TI C6x and Intel IA-64 architectures.