Skip to main content
Open Access Publications from the University of California

Roofline model toolkit: A practical tool for architectural and program analysis

  • Author(s): Lo, YJ
  • Williams, S
  • Van Straalen, B
  • Ligocki, TJ
  • Cordery, MJ
  • Wright, NJ
  • Hall, MW
  • Oliker, L
  • et al.

© Springer International Publishing Switzerland 2015. We present preliminary results of theRooflineToolkit formulticore, manycore, and accelerated architectures. This paper focuses on the processor architecture characterization engine, a collection of portable instrumented micro benchmarks implemented with MessagePassing Interface (MPI), and OpenMP used to express thread-level parallelism. These benchmarks are specialized to quantify the behavior of different architectural features. Compared to previous work on performance characterization, these microbenchmarks focus on capturing the performance of each level of the memory hierarchy, along with thread-level parallelism, instruction-level parallelism and explicit SIMD parallelism, measured in the context of the compilers and run-time environments. We also measure sustained PCIe throughput with four GPU memory managed mechanisms. By combining results from the architecture characterization with the Roofline model based solely on architectural specifications, this work offers insights for performance prediction of current and future architectures and their software systems. To that end, we instrument three applications and plot their resultant performance on the corresponding Roofline model when run on a Blue Gene/Q architecture.

Main Content
Current View