My thesis consists of three chapters on economic development.

Chapter 1:

The research on the catch-up process of a developing economy focuses on the role of foreign technology transfer and the importance of domestic technology transfer lacks study. We study the trends of expenditures on innovation, foreign technology transfer, and domestic technology transfer. During the transition period of China from 1998 to 2007, the expenditures on innovation and domestic technology transfer of Chinese firms in the manufacturing sector grow two times faster than the expenditure on foreign technology transfer. Furthermore, the estimated productivity at the firm level shows that rapid productivity growth is accompanied by decreasing productivity dispersion. The productivity dispersion has decreased by 39% in the same period. I document several empirical facts at the level of the industry. First, innovation is positively correlated with relative productivity. Second, the expenditure on domestic technology transfer increases in relative productivity and the growth rate of relative productivity is positively correlated to the expenditure on domestic technology transfer.

Chapter 2:

I develop a theory in which firms endogenously choose one of three mutually exclusive methods to increase productivity: innovation, foreign technology transfer, and domestic technology transfer. Domestic technology transfer offers firms with low productivity a chance to become highly productive by meeting highly productive domestic peers. Domestic technology transfer leads to faster growth of productivity and a greater number of firms with high productivity. The productivity growth in China makes more Chinese firms choose to innovate or learn from domestic peers in a dynamic environment. Thus, the expenditures on innovation and domestic technology transfer increase faster. In our model, firms with low productivity adopt foreign or domestic technology and grow faster than highly productive firms. This results in the decreasing productivity observed in the data.

We use the simulated method of moments to estimate the key parameter values of the transition model. Our model fits data well. After checking the model fit, we conduct two experiments to answer the two questions mentioned at the beginning of our talk. In one experiment, domestic technology transfer is not allowed, and I find that domestic technology transfer contributes 30% of productivity growth and 31% of relative innovation expenditure growth. In the other experiment, we improve the domestic intellectual property and the policy changes significantly reduce both productivity growth and expenditure on innovation.

Chapter 3:

Our economic geography model features cross-country productivity, human capital, amenity and population differences, international trade, migration cost, and heterogeneous working and entrepreneurial skills. We compare welfare under baseline parameterization with a migration autarky counterfactual and the welfare gains of the US native residents from migration reform. The gains from migration are substantial, as high as trade gains, and natives in countries that received a lot of migration are much better off, at about 5% to 15%. Both the native entrepreneurs and workers benefit from migration while the entrepreneurs tend to gain twice as large as the workers. The welfare of the US native entrepreneurs and workers can increase by 5.1% and 1.6% by optimizing migration frictions and the population of the US increases by 14.7% under optimization.

With the ever-increasing applications comes the realization that efforts and complexity for developing hardware to keep pace with such compute demands are growing at an even faster rate. And, the problem goes further. As the target cadence of Moore's law is already slipping, more burden is placed on the design methodology to achieve the "equivalent scaling". The proliferation of everywhere machine learning (ML) reveals its multi-faceted role: the killer applications that pull transition to novel hardware and compute paradigms (i.e., system for ML), and the important boosters to design methodology that push toward automated and agile hardware development (i.e., ML for system). Aiming to foster the virtuous cycle between ML and hardware, my research features hardware agile development empowered by ML and studies how to infuse intelligence, improve agility, and eventually enable no-human-in-the-loop automation for scalable and efficacious hardware development flow by synergistic investigation across algorithm, architecture, and electronic design automation (EDA).

Specifically, we investigate how different ML techniques can be applied for (1) fast and accurate design evaluation, (2) efficient and scalable design optimization, and (3) high-quality and productive design verification. In design evaluation, we leverage the inherent graph structures of data flow graphs and circuits and explore how domain knowledge can be infused into graph neural network (GNN)-based models, so that we can reconcile timeliness, accuracy, and generalization capability in high-level synthesis (HLS) and logic synthesis performance predictions. In design optimization, we exploit deep reinforcement learning for flexible, scalable, and automated design exploration in HLS resource allocation and workload placement optimization, which is efficient in large search spaces and can be transferred to new designs. In design verification, we utilize the message-passing mechanism in GNN computation to imitate conventional symbolic reasoning, which is scalable to extremely large Boolean networks with billions of nodes and makes better use of modern computing resources. Through multiple case studies, we showcase the possibilities and potentials of ML-driven methodologies in agile and intelligent hardware design and design automation. Going forward, we hope to see the virtuous cycle, in which ML-based techniques are efficiently running on the most powerful computers with the pursuit of designing the next generation computers.