SpecSyn is a system, modeling and synthesis tool designed in University of California, Irvine. Workbench is a commercial system modeling tool of Scientific Engineering Software. SpecSyn is based on Program-State-Machine (PSM) model while Workbench is based on Queuing Network model. In this report, we compare these two models by the feature of modeling a system and the application of these two tools. Two examples, answering machine controller and flash file system, are given to demonstrate the difference of modeling systems using SpecSyn and Workbench. The comparison shows that SpecSyn has more good features and is more suitable in the whole design process than Workbench. Improvements for the weakness of SpecSyn, such as pipeline behavior and queuing mechanism, are proposed to make SpecSyn applicable to wider variety of applications.
When moving toward hardware/software codesign, software estimation provides important information in chosing hardware implementation (ASIC) or software implementation (software running on processor). This report analizes the pipeline stall and superscalar interlock phenomenon and their influence on software performance. Simple processor profile is proposed to count these two effects. Based on generic estimation model, our estimator can produce accurate estimation without large computation time and precious resource, such as compilers or simulators for each processor. The accuracy and flexibility make our approach suitable for design automation tools.
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