The Antarctic Ross Ice-shelf Antenna Neutrino Array (ARIANNA) experiment is designed to detect ultra-high energy (UHE) neutrinos produced by the collisions of cosmic rays with the cosmic microwave background (CMB). A new single board data acquisition (DAQ) system was deployed as an instrumentation solution for the ARIANNA experiment and the heart of this new DAQ system is the Synchronous Sampling and Triggering (SST) integrated circuit. This dissertation focuses on the design and performance of the SST chip and a second experimental chip (SST0.18u) in an attempt to scale down and investigate design techniques to reduce fixed pattern noise.

The Synchronous Sampling and Triggering circuit can be dubbed as an "oscilloscope on a chip with triggering capabilities". Fabricated in 0.25u CMOS process, the SST contains 4 channels of 256 samples per channel. The chip has 1.9V input range on a 2.5V supply, 12 bits of dynamic range and an analog bandwidth of 1.5 GHz. The sampling clocks are generated synchronously via a circular array of high speed shift registers driven by an external LVDS oscillator. The SST can operate in wide range of sampling speeds with rates spanning over 6 orders of magnitude (2 k-samples/s to 2 G-samples/s). The SST was designed for simplicity of operation, only three active control signals are necessary for its operation. Each individual channel has a very sensitive real-time dual threshold triggering circuitry with windowed coincidence features to detect very small and fast impulse signals. The circuitry is capable of discriminating signals with ~1mV RMS resolution at >600 MHz bandwidth. Triggering options include, direct readout of comparator results or exclusive triggering on dual threshold crossing with adjustable time window. After calibrating for the fixed pattern timing noise, the SST achieves a timing resolution of 2.1 ps.

Fabricated in 0.18u RF CMOS process, a second chip (SST0.18u) was developed to reduce the fixed pattern sampling interval error. The SST0.18u contains 4 channels of 512 samples per channel. The chip achieves a sampling speed of 3 G-samples/s with analog bandwidth of 1.2 GHz. It has a 900 mV input range on a 1.8 V power supply. The fixed pattern timing noise is characterized by stochastic zero-crossing method and the RMS value of the sample interval error is 8.28 ps.

Equipped with the SST analog waveform recording and triggering chip, the new data acquisition system has been successfully developed and deployed in the Antarctica's Ross Ice Shelf. The DAQ systems are actively monitoring for short radio Cherenkov pulses since 2014-15 austral summer.

The ARIANNA experiment is an ultra-high energy neutrino detector designed to detect cosmogenic neutrinos. The experiment uses the Ross Ice Shelf to detect RF signals which are generated when the high energy neutrinos interact with the ice. The experiment plans to use a massive deployment of hundreds of antenna array stations to capture neutrino events over a large area. The stations use a data acquisition system to capture and store the data and subsequently transmit the data back to UCI. This thesis describes the design, functioning and results of the newest generation system which was deployed in the field in the 2014 season. The new system utilizes a new data digitization chip developed by the ARIANNA engineering group led by Dr. Stuart Kleinfelder. The new SST chip is a largely simplified and streamlined design compared to the previous generation chip and utilizes advanced circuitry to achieve fully synchronous operation while reducing the power usage by many factors. The new system makes substantial improvements over the previous generation system and introduces a number of new features, while providing a possible design solution for the final design requirements of the ARIANNA array systems.

A neutrino is one of the universe's essential ingredients. Neutrinos are very hard to detect because they have no electrical charges and interact little with other particles. Thus, extremely large and sensitive detectors are required to detect neutrinos. The Antarctic Ross Ice shelf ANtenna Neutrino Array (ARIANNA) is a proposed detector for Ultra High Energy (UHE) astrophysical neutrinos. It consists of a surface array of radio receivers and can observe 1 ns radio pulses generated by UHE neutrino interactions with oxygen and hydrogen nuclei in the ice of the Ross Ice Shelf.

Each ARIANNA station has four radio frequency antennas, four amplifiers, and a data acquisition system (DAQ). The DAQ of each station has four acquisition channels consisting of four daughter cards and a motherboard. Each daughter card has a custom CMOS digitization and real-time triggering circuitry (ATWD chip), and a field programmable gate array (FPGA) device. The Motherboard has four slots to connect with acquisition cards, another FGPA device for trigger control and data buffering, an embedded CPU with solid-state data storage, and interfaces to an Iridium satellite short burst data transceiver and a long-range wireless communications module.

Each acquisition card includes an Advanced Transient Waveform Digitizer (ATWD) chip; a high speed analog sampling, real time pattern matching triggering and digitizing integrated circuit. It has the ability to acquire the incoming waveforms at 2 GHz with over 11-bits of dynamic range. In each station, the acquisition cards receive detected amplified RF signals simultaneously and store them into 128 samples.

In addition, the ATWD has the ability to compensate for the fixed pattern noise (FPN) of the sampling and trigger circuitry, which are generated by variations in the gate to drain capacitance in the chip, or variations in the input offsets of the trigger comparators. If left uncorrected, FPN causes variations in trigger thresholds, effectively adding noise in the trigger. Calibration and cancellation of FPN is accomplished by programming per-comparator digital to analog converters to null the FPN at each comparator. After calibration, the RMS trigger noise is reduced by a factor of 3 to 4.

The data acquisition system is capable of accepting three types of triggers: external, forced, and thermal. An external trigger acts upon an external electrical input signal much like an oscilloscope's trigger and is used in the laboratory or in the field during experimental studies. A forced trigger is one that is caused by the acquisition system's CPU, and is typically used to force the periodic collection of data that is unbiased by the system's thermal trigger. These "thermal" triggers are the most interesting: they are generated by the signals that the data acquisition system is collecting. Noise - or the rare neutrino events ARIANNA is searching for - will at times cause input signals to exceed trigger thresholds. To allow for low thresholds while keeping trigger rates from being swamped by noise, the thermal trigger system is set up to accept only signal-like events rather than mere noise. This includes requiring bipolar triggers on a per-channel basis over a very brief (~4 ns) time period, plus a requirement that a majority of data acquisition channels (e.g., any 3 out of 4 channels) must all trigger within a brief time window (e.g., 64 ns). These more stringent requirements are expected to capture the vast majority of neutrino events while limiting the rate of "events" due solely to noise. After any triggering event, the sampling of incoming signal is halted, digitized data is read out from the acquisition cards and is stored locally in a solid-state memory card, and then it is transmitted to UC Irvine for further processing over Iridium satellite modem or long-distance wireless communication.

This dissertation focuses on the data acquisition system for ARIANNA, most particularly on the design and performance of its trigger system, including FPN calibration and correction and trigger efficiency.

The Antarctic Ross Ice shelf ANtenna Neutrino Array (ARIANNA) particle physics experiment aims to detect ultra-high energy neutrinos originating outside our solar system. A second generation detector prototype for the experiment has been developed and successfully deployed in Antarctica. The second generation detector is based on the Synchronous Sampling and Triggering (SST) integrated circuit. This dissertation focuses on the design and performance of the SST chip.

Fabricated in a 0.25um CMOS process, the SST is a low power data acquisition circuit that monitors for potential neutrino signals and preserves candidate signals. The waveform capture is performed with a 256-cell time-interleaved sampling array. Continuous sampling operation is achieved through circular cycling across the array. The synchronous sampling clock generation allows for sampling rates that span six orders of magnitude (i.e. ranging between 2.0 KHz and 2.0 GHz). The analog bandwidth (-3dB frequency) of the SST reaches 1.5 GHz, allowing for the capture of frequency components up to the Nyquist frequency. The SST integrates four channels of waveform capture functionality into a single chip.

Each SST channel includes event triggering to initiate the signal capture of neutrino events, and to reject random noise signals. Events are triggered based on outputs from a pair of high speed comparators that monitor for bipolar threshold crossings. Multiple triggering options are available on the SST, including direct output of the comparator signals and triggering on dual threshold crossings occurring within a programmable time window.

The SST chip utilizes an external low jitter LVDS oscillator to synchronously generate an internal sampling clock with low timing jitter. The fixed pattern timing noise was characterized through two different approaches: a stochastic zero crossing method and a Monte Carlo based simulated annealing method. After calibrating for fixed pattern timing noise, the SST achieves inter channel timing resolutions between 1.15 ps (RMS) and 2.36 ps (RMS).